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Resumen

 

CORRELATION COPROCESSOR BASED ON FPGA
COPROCESADOR DE CORRELACIÓN BASADO EN FPGA

Miguel O. Arias Estrada
Francisco J. Enríquez Aguilera1
Ricardo E. Pérez Blanco2


Abstrac: In this work, a hardware-architecture for correlation algorithm implementation is presented. The proposed architecture allows real time tracking. For the design the hardware description language VHDL (Very High Speed Integrated Circuit Hardware Description Language) was used, it was implemented on a FPGA (Field Programmable Gate Arrays) Spartan.

Resumen: En este trabajo se plantea una arquitectura hardware para la implementación del algoritmo de correlación. La principal característica de la arquitectura propuesta, es que permite efectuar el procesamiento de seguimiento en tiempo real. Para el diseño se utiliza el lenguaje de descripción de hardware VHDL, así mismo la implementación se lleva a cabo en un FPGA Spartan.

Palabras Clave: VHDL, FPGA, Vision, hardware y píxel.